发布时间: 2015年05月02日 21:45  |  作者:

Seminars on Advanced Parallel Computer Architecture

Advanced Topics in Computer Architecture  

报告题目:Synchronization, Coherence and Event Ordering in Multiprocessors

报告人:Michel Dubois, 教授, IEEE Fellow, 美国南加州大学(University of Southern California, USA)






       This title is the title of a paper that I published way back in February 1988 in IEEE Computer. At that time very few were thinking about this problem. Since then it has become and remained one of the main problems in Computer Architecture and even Theory of Computing, with a recent renaissance due to the emergence of chip multiprocessors (CMPs). Understanding this problem and its solutions is essential to the design of correct shared-memory systems and CMPs. Yet, I found over time and I still find today that, after all that time, after all the papers written and printed, all the books, all the symposiums and workshops, all the talks, all the discussions in back rooms, memory coherence and consistency are still ill-understood by students and researchers alike. It is also a very difficult topic, with two poles: one in architecture and one in theory. In this course I will present my own view of this area. This will not be a theoretical course, but it will be solidly grounded in architecture and logically developed. Mechanisms such as synchronization primitives and coherence protocols will be reduced to the strict minimum in order to simplify logical arguments.

The course will include:
       -Introduction: synchronization mechanisms and basic coherence protocols
       -Coherence: why is it so hard to understand?
       -Two views of coherence and why one is wrong
        o  Store atomicity
        o  Plain coherence
       -Memory Consistency Models
        o  Definitions in the context of in-order processors
        o  Speculative violations of memory consistency in out-of-order processors
       -Do we need coherence? 


       Michel Dubois is a Professor of Computer Engineering in the Ming-Hsieh Department of Electrical Engineering at the University of Southern California. Before joining U.S.C. in 1984, he was a research engineer at the Central Research Laboratory of Thomson-CSF in Orsay, France.

       He has published more than 150 technical papers on computer architectures and algorithms. He is well known for his early work on cache coherence and memory consistency models. From 1993 to 2001 he led the RPM Project, a project funded by the National Science Foundation. RPM was a hardware platform to emulate multiprocessor systems with widely different architectures and memory models. In this project a multiprocessor machine was built with off-the-shelf components and FPGAs. His current research interests are chip multiprocessor architectures and the impact of technological trends on micro-architectures.

       Dubois holds a Ph.D. from Purdue University, an MS from the University of Minnesota, and an engineering degree from the Faculte Polytechnique de Mons in Belgium, all in Electrical Engineering.

       He is a fellow of the IEEE (1999) and a fellow of the ACM (2006), for his technical contributions to memory systems, multiprocessor architecture, and information technology.




       杜布瓦教授因其在存储系统、多处理器体系结构和信息技术方面的贡献获选为IEEE fellow(1999年)和ACM fellow(2006年)。


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